Distributed storage of data

ABSTRACT

Multi-reliability regenerating (MRR) erasure codes are disclosed. The erasure codes can be used to encode and regenerate data. In particular, the regenerating erasure codes can be used to encode data included in at least one of two or more data messages to satisfy respective reliability requirements for the data. Encoded portions of data from one data message can be mixed with encoded or unencoded portions of data from a second data message and stored at a distributed storage system. This approach can be used to improve efficiency and performance of data storage and recovery in the event of failures of one or more nodes of a distributed storage system.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of and claims priority to U.S. patent application Ser. No. 14/339,757, entitled “Distributed Storage of Data,” filed Jul. 24, 2014, now U.S. Pat. No. 9,575,846, which is incorporated herein by reference in its entirety.

COPYRIGHT NOTIFICATION

A portion of the disclosure of this patent document and its attachments contain material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyrights whatsoever.

BACKGROUND

Distributed storage is commonly used to reliably store data. Should a storage node fail (which may regularly occur in large scale systems), the data may be reliably recovered from other, operating storage nodes.

BRIEF DESCRIPTION OF THE DRAWINGS

The features, aspects, and advantages of the exemplary embodiments are understood when the following Detailed Description is read with reference to the accompanying drawings, wherein:

FIG. 1 is simplified schematic illustrating an environment in which exemplary embodiments may be implemented;

FIG. 2 is a more detailed illustration of a storage node, according to exemplary embodiments;

FIGS. 3-4 are schematics illustrating reliability requirements, according to exemplary embodiments;

FIG. 5 is a schematic illustrating a rate region, according to exemplary embodiments;

FIGS. 6-7 depict still more operating environments for additional aspects of the exemplary embodiments; and

FIG. 8 is a flowchart illustrating a method or algorithm for storage of data, according to exemplary embodiments.

DETAILED DESCRIPTION

The exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings. The exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. These embodiments are provided so that this disclosure will be thorough and complete and will fully convey the exemplary embodiments to those of ordinary skill in the art. Moreover, all statements herein reciting embodiments, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future (i.e., any elements developed that perform the same function, regardless of structure).

Thus, for example, it will be appreciated by those of ordinary skill in the art that the diagrams, schematics, illustrations, and the like represent conceptual views or processes illustrating the exemplary embodiments. The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing associated software. Those of ordinary skill in the art further understand that the exemplary hardware, software, processes, methods, and/or operating systems described herein are for illustrative purposes and, thus, are not intended to be limited to any particular named manufacturer.

As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless expressly stated otherwise. It will be further understood that the terms “includes,” “comprises,” “including,” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Furthermore, “connected” or “coupled” as used herein may include wirelessly connected or coupled. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

It will also be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first device could be termed a second device, and, similarly, a second device could be termed a first device without departing from the teachings of the disclosure.

FIG. 1 is a simplified schematic illustrating an environment in which exemplary embodiments may be implemented. FIG. 1 illustrates different storage nodes 20 in a distributed storage system 22 of multiple interconnected storage nodes. The different storage nodes 20 communicate individually, or with each other, using a communications network 24. FIG. 1, for simplicity, illustrates each one of the different storage nodes 20 as different servers 26-32. In practice, though, any mobile or stationary processor-controlled device may function as any one of the storage nodes 20, as later paragraphs will explain. Regardless, each different storage node 20 is associated with a unique network address 34 in the communications network 24. When any data 36 needs to be reliably stored, the storage of the data 36 may be distributed across any of the storage nodes 20 in the communications network 24. That is, the distributed storage system 22 may comprise a network of servers, and/or other devices, that distribute storage of the data 36 to ensure redundancy. Should any of the storage nodes 20 fail, redundant portions of the data 36 may be recovered from other storage nodes 20. Because distributed storage systems are generally well known, no detailed explanation is needed.

FIG. 2 is a more detailed illustration of one of the storage nodes 20, according to exemplary embodiments. The storage nodes are again illustrated as different servers 26-32. For example, the server 26 may be instructed to reliably and redundantly store the data 36 for retrieval. The data 36 is typically arranged as bits or bytes of information in video, music, and other files. Whatever the format of the data 36, the data 36 may be unencoded and typically divided into unencoded blocks 50 of data, with each individual unencoded block 50 of data having any size or quantity of bits. The server 26 has a processor 52 (e.g., “μP”), application specific integrated circuit (ASIC), or other component that executes an encoding algorithm 54 stored in memory 56. The encoding algorithm 54 transforms each individual unencoded block 50 of data into an encoded block 58 of data. The server 26 then disperses the encoded blocks 58 of data as different data messages 60 into the communications network 24. The server 26 routes the data messages 60 to one or more other storage nodes 20. Should any one of the storage nodes 20 fail, the data messages 60 stored at that failed storage node may be irretrievable. However, exemplary embodiments may reconstruct the data messages 60 stored at the failed storage node. That is, the data messages 60 stored at functioning storage nodes 20 may be used to reconstruct data lost on the failed storage node.

Exemplary embodiments may use any encoding algorithm. While there are many known algorithms, this disclosure will hereinafter be explained using the well-known Reed-Solomon coding. The Reed-Solomon coding may be used to detect and correct errors in data. For the purposes of this disclosure, the Reed-Solomon coding may be used as erasure codes 70 to recover the data lost to a failed storage node. Each one of the encoded data messages 60 thus contains information describing symbolic coefficients 72 of a polynomial expression. Consider a data message M having information symbols (x₁, x₂, x₃). Application of the Reed-Solomon coding encodes the information symbols (x₁, x₂, x₃) into ten (10) coded symbols (z₁, z₂, z₃, . . . z₁₀). Should a storage node 20 fail, any three (3) members of the ten (10) coded symbols z_(i) may be retrieved from the other storage nodes 20. The server 26 may then execute a decoding algorithm 74 to completely recover M(x₁, x₂, x₃). The data message M has thus been reliably and redundantly stored in the distributed storage system 22.

Exemplary embodiments may be applied regardless of networking environment. The communications network 24 may be a wireless network having cellular, WI-FI®, and/or BLUETOOTH® capability. The communications network 24, however, may be a cable network operating in the radio-frequency domain and/or the Internet Protocol (IP) domain. The communications network 24, however, may also include a distributed computing network, such as the Internet (sometimes alternatively known as the “World Wide Web”), an intranet, a local-area network (LAN), and/or a wide-area network (WAN). The communications network 24 may include coaxial cables, copper wires, fiber optic lines, and/or hybrid-coaxial lines. The communications network 24 may even include wireless portions utilizing any portion of the electromagnetic spectrum and any signaling standard (such as the IEEE 802 family of standards, GSM/CDMA/TDMA or any cellular standard, and/or the ISM band). The communications network 24 may even include power line portions, in which signals are communicated via electrical wiring. The concepts described herein may be applied to any wireless/wireline communications network, regardless of physical componentry, physical configuration, or communications standard(s).

FIGS. 3-4 are schematics illustrating reliability requirements, according to exemplary embodiments. The digital contents stored in large-scale distributed storage systems usually have different reliability requirements. For example, a company may consider it important to protect recent customer billing records with a very reliable erasure code (illustrated as reference numeral 70 in FIG. 2). However, old data (such as ten-year old word processing files) may not need high redundancy in backups, so weaker erasure codes 70 may be used with a higher probability of data loss. Such flexibility can significantly reduce the cost of hardware infrastructure, and there is tremendous interest recently in designing efficient software defined storage (SDS) systems utilizing flexible erasure codes 70. The theoretical framework of symmetric multilevel diversity (MLD) coding is a rather natural fit for this scenario, where there are a total of k₀≤n, of independent messages m (m₁, m₂, . . . m_(k0)) to be stored, where n is the number of the storage nodes 20 situated in different network locations, each with α units of data. The data messages 60 are encoded in such a way that by accessing any k≤k₀ of these storage nodes 20, the first k messages (m₁, m₂, . . . m_(k)) can be completely recovered.

FIG. 4 illustrates a repair of a failed storage node 20. Disk or node failures occur regularly in a large-scale storage system, and the overall quality of service is heavily affected by the efficiency of the repair process. The regenerating codes 70 have been used to address the tradeoff between the storage and repair-bandwidth in erasure-coded distributed storage systems. To repair a failed storage node, a new storage node requests β units of data each from any of the d remaining, operational storage nodes 20, and regenerates the α units of content to store on the new node. The content regenerated is allowed to be only functionally equivalent to the content on the failed node, thus the name “functional-repair” regenerating codes. In practice, requiring the content regenerated to be exactly the same as that on the failed node can simplify the system design significantly, and thus exemplary embodiments may be used “exact-repair” regenerating codes 70.

In the conventional regenerating code framework, only a single data message 60 is allowed. The single data message 60 only offers a single level of reliability. In the theoretical framework of symmetric multilevel diversity (MLD) coding, however, the data repair process was not considered. Exemplary embodiments thus consider repair-efficient codes in systems with heterogeneous reliability requirements, and exemplary embodiments investigate the optimal storage verses repair-bandwidth tradeoff. Because of the connection to the MLD problem and the regenerating code problem, this disclosure uses the term multi-reliability regenerating (or “MRR”) codes 70. This disclosure explains exact-repair for when d=n−1, as this scenario is perhaps the most practical case. In general, though, the framework may be generalized to other scenarios of d=n−x, where x is less than n (e.g., the number of the storage nodes 20 situated in different network locations).

Exemplary embodiments may mix the symbolic coefficients (illustrated as reference numeral 72 in FIG. 2). An intuitive and straightforward coding strategy is to use individual regenerating code for each data message 60 to satisfy the respective reliability requirement. Exemplary embodiments, however, may determine that better results are obtained using codes that mix the symbolic coefficients 72 of different data messages 60. Previous studies have shown that, without the repair consideration, no mixing is necessary for the symmetric MLD coding problem. Exemplary embodiments, however, may determine that with repair consideration, although for the case of n=3, the optimal solution does not require mixing. Yet, for the case of n=4 storage nodes, mixing can strictly improve upon the performance of the separate coding solution.

The multi-reliability regenerating (or “MRR”) codes 70 are now defined. The notation I_(n) is used to denote the set {1, 2, . . . , n), and |A| is used to denote the cardinality of a set A.

Definition 1: An (N₁, N₂, . . . , N_(d), K_(d), K) multi-reliability regenerating code consists of n encoding functions f_(i) ^(E)(•), Σ_(i=1) ^(d)(_(i) ^(n)) decoding functions f_(A) ^(D)(•, . . . , •), n(n−1) repair encoding functions f_(i,j) ^(E)(•), and n repair decoding functions F_(i) ^(D)(•, . . . , •), where f _(i) ^(E) :I _(N) ₁ ×I _(N) ₂ × . . . ×I _(N) _(d) →I _(K) _(d) , i∈I _(n), each of which maps the message (m₁, m₂, . . . m_(d))∈I_(N1)×I_(N2)× . . . ×I_(Nd) to one piece of coded information, f _(A) ^(D) : I _(K) _(d) ×I _(K) _(d) × . . . ×I _(K) _(d) →I _(N) ₁ ×I _(N) ₂ × . . . ×I _(N) _(|A|) , A⊂I _(n) and |A|≤d, each of which maps coded information stored on the set A of nodes to the first |A| messages (m₁, m₂, . . . m_(|A|)), F _(i,j) ^(E) :I _(K) _(d) →I _(K) , j∈I _(n), and i∈I _(n) \{j}, each of which maps d such indices from the helper nodes to reconstruct the information stored at the failed node. The functions must satisfy the data reconstruction conditions

${{f_{A}^{D}\left( {\prod\limits_{i \in A}{f_{i}^{E}\left( {m_{1},m_{2},\ldots\mspace{14mu},m_{d}} \right)}} \right)} = \left( {m_{1},m_{2},\ldots\mspace{14mu},m_{A}} \right)},{\left( {m_{1},m_{2},\ldots\mspace{14mu},m_{d}} \right) \in {I_{N_{1}} \times I_{N_{2}} \times \ldots \times I_{N_{d}}}},{A \Subset {{I_{n}\mspace{14mu}{and}\mspace{14mu}{A}} \leq d}},$ and the repair conditions

${{F_{j}^{D}\left( {\prod\limits_{i \in {I_{n}\backslash{\{ j\}}}}{F_{i,j}^{E}\left( {f_{i}^{E}\left( {m_{1},m_{2},\ldots\mspace{14mu},m_{d}} \right)} \right)}} \right)} = {f_{j}^{E}\left( {m_{1},m_{2},\ldots\mspace{14mu},m_{d}} \right)}},{\left( {m_{1},m_{2},\ldots\mspace{14mu},m_{d}} \right) \in {I_{N_{1}} \times I_{N_{2}} \times \ldots \times I_{N_{d}}}},{j \in {I_{n}.}}$ It can be assumed without loss of generality d=k₀, then the messages (m_(d+1), m_(d+2), . . . , m_(k0)) can be viewed as part of m_(d); on the other hand if d>k₀, then one may simply consider an alternative problem with k′₀=d and define the messages m_(k) ₀ , m_(k) ₀₊₁ , . . . m_(d) to be degenerate. Note that α=log K_(d) is the storage size, β=log K is the repair bandwidth, and B_(i)=log N_(i) is the rate of the i-th message; the base of log (•) is arbitrary, and choose base 2 for convenience. Because of the linear scaling relation among them, one may thus consider the normalized version as follows. Definition 2:

A normalized bandwidth-storage pair (α, β) is said to be achievable with n nodes and normalized message rates (B₁ , B₂ , . . . , B_(d) ) if for any ∈>0 there exists an (N₁, N₂, . . . , N_(d), K_(d), K) multi-reliability regenerating code such that

${{\overset{\_}{\alpha} + \epsilon} \geq \frac{\log\; K_{d}}{\sum\limits_{i = 1}^{d}{\log\; N_{i}}}},{{\overset{\_}{\beta} + \epsilon} \geq \frac{\log\; K}{\sum\limits_{i = 1}^{d}{\log\; N_{i}}}},{{{\overset{\_}{B}}_{i} - \epsilon} \leq \frac{\log\; N_{i}}{\sum\limits_{i = 1}^{d}{\log\; N_{i}}}},{i = 1},2,\ldots\mspace{11mu},{d.}$ The collection of all the achievable (α, β) pairs for normalized message rates (B₁ , B₂ , . . . , B_(d) ) is the achievable rate region

_(n)(B₁ , B₂ , . . . , B_(d) ) of the multi-reliability regenerating codes 70.

FIG. 5 is a schematic illustrating a rate region, according to exemplary embodiments. One straightforward achievable coding strategy is to encode each individual message using a regenerating code of the necessary strength. More precisely, the message M_(k) is encoded using an (n, k, d) regenerating code 70 (i.e., any k nodes can recover the message M_(k), and any new node obtains information from any d nodes for repair) of rate (α_(k), β_(k)), and the resultant code 70 thus has storage rate and repair rate:

${\alpha = {\sum\limits_{k = 1}^{d}\alpha_{k}}},{\beta = {\sum\limits_{k = 1}^{d}{\beta_{k}.}}}$ In order to characterize this region

_(n)(B₁ , B₂ , . . . , B_(d) ), rate region characterization of each individual regenerating code 70 may be needed; e.g., for the case of n=3, rate region characterizations for (3, 1, 2) and (3, 2, 2) regenerating codes 70 are needed. However, such characterizations for general parameters are still unknown, except for the case of k=1, 2, and the special case (n, k, d)=(4, 3, 3) which was only recently established. Fortunately, using these existing results, one may provide characterization for the separate coding achievable region for MRR when n=3, denoted as

₃ (B₁ , B₂ ), and that when n=4, denoted as

₄(B₁ , B₂ , B₃ ). FIG. 5, for example, illustrates an achievable rate region

₄(0, ⅓, ⅔).

Proposition 1:

The rate region

₃, (B₁ , B₂ ) achievable using separate coding is the set of (α, β) pairs satisfying the following conditions

${\overset{\_}{\alpha} \geq {{\overset{\_}{B}}_{1} + \frac{{\overset{\_}{B}}_{2}}{2}}},{{\overset{\_}{\alpha} + \overset{\_}{\beta}} \geq {\frac{3{\overset{\_}{B}}_{1}}{2} + {\overset{\_}{B}}_{2}}},{\overset{\_}{\beta} \geq {\frac{{\overset{\_}{B}}_{1}}{2} + {\frac{{\overset{\_}{B}}_{2}}{3}.}}}$

Proposition 2:

The rate region

₄(B₁ , B₂ , B₃ ) achievable using separate coding is the set of (α, β) pairs satisfying the following conditions

$\begin{matrix} {\overset{\_}{\alpha} \geq {{\overset{\_}{B}}_{1} + \frac{{\overset{\_}{B}}_{2}}{2} + \frac{{\overset{\_}{B}}_{3}}{3}}} & (1) \\ {{{2\overset{\_}{\alpha}} + \overset{\_}{\beta}} \geq {\frac{7{\overset{\_}{B}}_{1}}{3} + \frac{5{\overset{\_}{B}}_{2}}{4} + {\overset{\_}{B}}_{3}}} & (2) \\ {{{4\overset{\_}{\alpha}} + {6\overset{\_}{\beta}}} \geq {{6{\overset{\_}{B}}_{1}} + \frac{7{\overset{\_}{B}}_{2}}{2} + {3{\overset{\_}{B}}_{3}}}} & (3) \\ {{\overset{\_}{\alpha} + {2\overset{\_}{\beta}}} \geq {\frac{5{\overset{\_}{B}}_{1}}{3} + {\overset{\_}{B}}_{2} + {\frac{5}{6}{\overset{\_}{B}}_{3}}}} & (4) \\ {\overset{\_}{\beta} \geq {\frac{{\overset{\_}{B}}_{1}}{3} + {\frac{1}{5}{\overset{\_}{B}}_{2}} + {\frac{1}{6}{{\overset{\_}{B}}_{3}.}}}} & (5) \end{matrix}$ FIG. 5 thus illustrates this achievable region for the case B₂ =⅓ and B₃ ×=⅔.

Results are now discussed regarding the case of n=3 multi-reliability regenerating codes 70.

Theorem 1:

₃(B ₁, B ₂){tilde under (=)}

³ (B ¹ , B ₂). The forward direction

₃( B ₁ ,B ₂)⊂

₃( B ₁ ,B ₂) is straightforward, and the converse direction is proved in later paragraphs. This theorem states that for the case of (n, d)=(3, 2), the strategy of separate coding is optimal, and there is no need to mix the data messages 60. However, the below result shows that this is, in general, not true, and mixing the messages is beneficial.

Theorem 2:

The rate pair ( 4/9, 2/9) ∈

₄(0, ⅓, ⅔), but 4/9, 2/9) ∉

₄(0, ⅓, ⅔).

In other words, the inclusion

₄( 4/9, 2/9)∈

₄(0,⅓,⅔ is strict. This theorem provides a case where by mixing the data messages 60, a point outside of the separate coding rate region can be achieved (as FIG. 5 illustrates). It is clear that more generally such mixing is necessary for the optimal solution.

Theorem 2 is now proved.

Proof: Let us first show that ( 4/9, 2/9) ∉

₄(0, ⅓, ⅔). Substituting the quantities α= 4/9,β= 2/9,B ₁=0,B ₂=⅓,B ₃=⅔, to test inequality (3), it is clear that this inequality is not satisfied, and thus the claim.

It remains to show ( 4/9, 2/9) ∈

₄(0, ⅓, ⅔), for which we give a novel code construction where B₁=0, B₂=3, B₃=6, α=4 and β=2. For concreteness, the code symbols and algebraic operations are in GF(2⁴). Let us denote the information symbols of message M₂ as (x₁, x₂, x₃), and the symbols of message M₃ as (y₁, y₂, . . . y₆).

Exemplary embodiments may encode. First use a (10, 3) MDS erasure code (e.g., Reed-Solomon code) to encode (x₁, x₂, x₃) into ten (10) coded symbols (z₁, z₂, . . . , z₁₀), such that any three symbols can completely recover (x₁, x₂, x₃). Then place the linear combination of the symbols into memory of the nodes as in Table I (below), where the addition+is also in GF(2⁴).

TABLE I A CODE FOR n = 4 WHERE (α, β) = (4, 2) AND (B₁, B₂, B₃) = (0, 3, 6). symbol 1 symbol 2 symbol 3 symbol 4 node 1 z₁ z₅ + y₁ y₂ y₃ node 2 z₂ z₆ + y₄ y₁ y₅ node 3 z₃ z₇ + y₂ y₆ + z₁₀ y₄ node 4 z₄ z₈ + y₃ y₅ + z₉  y₆ The server 26 may thus store the symbolic coefficients in a database that maps the symbolic coefficients to the address(es) of the storage node(s). Should any one of the storage nodes fail, the database may be queried for the symbolic coefficients stored at other storage nodes. Any symbolic coefficients may thus be retrieved for quick regeneration of a data message.

Exemplary embodiments may also decode. Message M₂ may be decoded using any two nodes. For example, to decode M₂, the reader may observe, from Table I, that any pair of nodes has two symbols involving the same y_(j), in the form of (z_(i)+y_(j)) in one node and y_(j) in the other node. For example, node 2 has symbol z₆+y₄ and node 3 has y₄. This implies z_(i) can be recovered, and together with the first symbols stored in this pair of nodes, three distinct symbols are known in the set (z₁, z₂, . . . , z₁₀). Thus by the property of the MDS code, these three symbols can be used to recover (x₁, x₂, x₃) and thus the message M₂.

Decoding may also be performed for messages M₂ and M₃ using any three nodes. Recall that by using any two nodes, the message M₂ may be recovered, and thus all the code symbols (z₁, z₂, . . . , z₁₀). This result implies that when three nodes are available, all the z_(i) symbols may be first eliminated in the linear combinations. However, it is clear that after this step all the symbols (y₁, y₂, . . . , y₆) are directly available, and thus the message M₃ can be decoded.

Exemplary embodiments may also repair using any three nodes. To regenerate the symbols in one node from the other three, each of the helper nodes sends the first symbol stored on the nodes as the initial step. Denote they symbols on the failed node as (y_(i), y_(j), y_(k)), which may be stored in a form also involving z-symbols. The helper nodes each find in the symbols stored on it the one involving y_(i), y_(j), and y_(k), respectively, and send these symbol combinations as the second step. The placement of the y-symbol guarantees that these symbols are stored on the three helper nodes respectively. Recall that from any three z-symbols available in the initial step, the message M₂ can be recovered, and thus any of the z-symbols. This implies that (y_(i), y_(j), y_(k)) can be recovered after eliminating the z symbols from the received symbol combinations in the second step, and thus all the symbols on the failed node can be successfully regenerated. Each helper node contributes exactly two (2) symbols in this process.

In the above code, the linear combinations of z-symbols and y-symbols are not necessarily in GF(2⁴), and it can even be GF(2). The only constraint on the alphabet size is through the MDS erasure code used when encoding (x₁, x₂, x₃), and this disclosure uses GF(2⁴) for simplicity. The reader may recognize that if message M₂=(x₁, x₂, x₃) does not exist, the remaining code involving y's is a degenerate case of the known repair-by-transfer code.

A proof of Proposition 1 is now presented. It is known that the rate region of (3, 1, 2) regenerating codes (before normalization) is

${\alpha_{1} \geq B_{1}},{\beta_{1} \geq \frac{B_{2}}{2}},$ and the rate region of (3, 2, 2) regenerating codes is 2α₂ ≥B ₂,α₂+β₂ ≥B ₂,3β₂ ≥B ₂. It is straightforward to verify that that the separate coding indeed leads to the rate region given in Proposition 1 using Fourier-Motzkin elimination.

A proof of Proposition 2 is now presented. Using Fourier-Motzkin elimination directly for this case is time-consuming, so exemplary embodiments instead consider inner bounding and outer bounding the region. It is known that the rate region of (4, 1, 3) regenerating codes is

$\begin{matrix} {{\alpha_{1} \geq B_{1}},{\beta_{1} \geq \frac{B_{1}}{3}},} & (8) \end{matrix}$ and thus there is only one corner point of the rate region, which is

$\left( {B_{1},\frac{B_{1}}{3}} \right).$

The rate region of (4, 2, 3) regenerating codes is 2α₂ ≥B ₂,α₂+2β₂ ≥B ₂,5β₂ ≥B ₂,  (9) and there are two corner points in this rate region, which are

$\begin{matrix} {\left( {\frac{B_{2}}{2},\frac{B_{2}}{4}} \right),{\left( {\frac{3B_{2}}{5},\frac{B_{2}}{5}} \right).}} & (10) \end{matrix}$ The rate region of (4, 3, 3) regenerating codes is 3α₂ ≥B ₃,2α₂+β₂ ≥B ₃,4α₂+6β₂≥3B ₃,6β₂ ≥B ₃.  (11) There are three corner points in this rate region, which are

$\begin{matrix} {\left( {\frac{B_{3}}{3},\frac{B_{3}}{3}} \right),\left( {\frac{3B_{3}}{8},\frac{B_{3}}{4}} \right),{\left( {\frac{B_{3}}{2},\frac{B_{3}}{6}} \right).}} & (12) \end{matrix}$ It is straightforward to show that the inequalities in Proposition 2 have to hold in this achievability scheme, e.g.,

$\begin{matrix} \begin{matrix} {{{4\alpha} + {6\beta}} = {{4\left( {\alpha_{1} + \alpha_{2} + \alpha_{3}} \right)} + {6\left( {\beta_{1} + \beta_{2} + \beta_{3}} \right)}}} \\ {\overset{(a)}{\geq}{{6B_{1}} + {4\left( {\alpha_{2} + \alpha_{3}} \right)} + {6\left( {\beta_{2} + \beta_{3}} \right)}}} \\ {= {{6B_{1}} + \alpha_{2} + {3\left( {\alpha_{2} + \beta_{2}} \right)} + \left( {{4\alpha_{3}} + {6\beta_{3}}} \right)}} \\ {\overset{(b)}{\geq}{{6B_{1}} + {\frac{7}{2}B_{2}} + \left( {{4\alpha_{3}} + {6\beta_{3}}} \right)}} \\ {{\overset{(c)}{\geq}{{6B_{1}} + {\frac{7}{2}B_{2}} + {3B_{3}}}},} \end{matrix} & (13) \end{matrix}$ where Equation (a) is because of Equation (8), Equation (b) because of Equation (9), and Equation (c) because of Equation (11). Referring to FIG. 5, the corner points of the region in Proposition 2 are

$\left( {{{\overset{\_}{B}}_{1} + \frac{{\overset{\_}{B}}_{2}}{2} + \frac{{\overset{\_}{B}}_{3}}{3}},{\frac{{\overset{\_}{B}}_{1}}{3} + \frac{{\overset{\_}{B}}_{2}}{4} + \frac{{\overset{\_}{B}}_{3}}{3}}} \right)$ $\left( {{{\overset{\_}{B}}_{1} + \frac{{\overset{\_}{B}}_{2}}{2} + \frac{3{\overset{\_}{B}}_{3}}{8}},{\frac{{\overset{\_}{B}}_{1}}{3} + \frac{{\overset{\_}{B}}_{2}}{4} + \frac{{\overset{\_}{B}}_{3}}{4}}} \right)$ $\left( {{{\overset{\_}{B}}_{1} + \frac{{\overset{\_}{B}}_{2}}{2} + \frac{{\overset{\_}{B}}_{3}}{2}},{\frac{{\overset{\_}{B}}_{1}}{3} + \frac{{\overset{\_}{B}}_{2}}{4} + \frac{{\overset{\_}{B}}_{3}}{6}}} \right)$ $\left( {{{\overset{\_}{B}}_{1} + \frac{3{\overset{\_}{B}}_{2}}{5} + \frac{{\overset{\_}{B}}_{3}}{2}},{\frac{{\overset{\_}{B}}_{1}}{3} + \frac{{\overset{\_}{B}}_{2}}{5} + \frac{{\overset{\_}{B}}_{3}}{6}}} \right),$ and it is easily seen that these rate pairs are all achievable. The proof is thus complete.

A converse proof of Theorem 1 is now presented. It is already known that only symmetric codes need be considered, where permutations of node indices do not change joint entropy values. Thus without loss of generality, exemplary embodiments may restrict the proof to symmetric codes only. Denote the information stored at node i as W_(i), and the helper information sent from node i to node j as S_(i,j). First write the following inequalities

$\begin{matrix} \begin{matrix} {\alpha \geq {H\left( W_{1} \right)}} \\ {\overset{(a)}{=}{H\left( {W_{1},M_{1}} \right)}} \\ {\geq {{H\left( {W_{1}❘M_{1}} \right)} + B_{1}}} \\ {\overset{(s)}{=}{B_{1} + {\frac{1}{2}\left\lbrack {{H\left( {W_{1}❘M_{1}} \right)} + {H\left( {W_{2}❘M_{1}} \right)}} \right\rbrack}}} \\ {\geq {B_{1} + {\frac{1}{2}{H\left( {W_{1},{W_{2}❘M_{1}}} \right)}}}} \\ {\overset{(c)}{=}{B_{1} + {\frac{1}{2}{H\left( {W_{1},W_{2},{M_{2}❘M_{1}}} \right)}}}} \\ {\geq {B_{1} + {\frac{1}{2}{H\left( {M_{2}❘M_{1}} \right)}}}} \\ {{\geq {B_{1} + {\frac{1}{2}B_{2}}}},} \end{matrix} & (14) \end{matrix}$ where Equation (a) is because message M₁ can be recovered from W₁ alone, and Equation (s) implies by the existence of symmetric solutions, Equation (c) is because (W₁, W₂) together can recover M₂. Dividing both sides of Equation (14) by (B₁+B₂) gives the result. The proof next uses Equation (s) to denote by the reason of the symmetry. Next, β is bound by writing

$\begin{matrix} \begin{matrix} {\beta \geq {\frac{1}{2}\left\lbrack {{H\left( S_{1,3} \right)} + {H\left( S_{2,3} \right)}} \right\rbrack}} \\ {\geq {\frac{1}{2}\left\lbrack {H\left( {S_{1,3},S_{2,3}} \right)} \right\rbrack}} \\ {\overset{(a)}{=}{\frac{1}{2}\left\lbrack {H\left( {S_{1,3},S_{2,3},W_{3},M_{1}} \right)} \right\rbrack}} \\ {{\geq {{\frac{1}{2}B_{1}} + {\frac{1}{2}{H\left( {S_{1,3},S_{2,3},{W_{3}❘M_{1}}} \right)}}}},} \end{matrix} & (15) \end{matrix}$ where Equation (a) is because from the helper message S_(1,3) and S_(2,3), and W₃ can be regenerated.

To bound the second term above, write

$\begin{matrix} \begin{matrix} {{H\left( {S_{1,3},S_{2,3},{W_{3}\left. M_{1} \right)}} \right\rbrack}\overset{(a)}{=}{H\left( {S_{1,3},S_{2,3},W_{3},S_{3,1},{S_{3,2}\left. M_{1} \right)}} \right.}} \\ {\geq {H\left( {S_{1,3},S_{2,3},S_{3,1},{S_{3,2}\left. M_{1} \right)}} \right.}} \\ {\overset{(s)}{=}{\frac{1}{3}\left\lbrack {H\left( {S_{1,3},S_{2,3},S_{3,1},{{S_{3,2}\left. M_{1} \right)} +}} \right.} \right.}} \\ {H\left( {S_{1,2},S_{3,2},S_{2,1},{{S_{2,3}\left. M_{1} \right)} +}} \right.} \\ {H\left( {S_{3,1},S_{2,1},S_{1,2},{S_{1,3}\left. M_{1} \right)}} \right\rbrack} \\ {\overset{b}{\geq}{\frac{1}{3}\left\lbrack {{H\left( {S_{1,3},S_{2,3},S_{3,1},S_{3,2},S_{1,2},{S_{2,1}❘M_{1}}} \right)} +} \right.}} \\ {{H\left( {S_{3,2},{S_{2,3}❘M_{1}}} \right)} +} \\ \left. {H\left( {S_{3,1},S_{2,1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} \right\rbrack \\ {\overset{(c)}{=}{\frac{1}{3}\left\lbrack {B_{2} + {H\left( {S_{3,2},{S_{2,3}❘M_{1}}} \right)} +} \right.}} \\ \left. {H\left( {S_{3,1},S_{2,1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} \right\rbrack \\ {\geq {\frac{1}{3}\left\lbrack {B_{2} +} \right.}} \\ \left. {H\left( {S_{3,2},S_{2,3},S_{3,1},S_{2,1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} \right\rbrack \\ {\geq {\frac{1}{3}\left\lbrack {B_{2} + {H\left( {M_{2}❘M_{1}} \right)}} \right\rbrack}} \\ {{\geq \frac{2B_{2}}{3}},} \end{matrix} & (16) \end{matrix}$ where Equation (a) is because S_(3,1), S_(3,2) are functions of W₃, Equation (b) is because H(S _(1,3) ,S _(3,1) |S _(3,2) ,S _(2,3) ,M ₁)≥H(S _(1,3) ,S _(3,1) |S _(1,2) ,S _(3,2) ,S _(2,1) ,S _(2,3) ,M ₁),  (17) and Equation (c) is because from (S_(1,3), S_(2,3), S_(3,1), S_(2,1)) the information (W₁, W₃) can be regenerated and subsequently decode message M₂. It follows that β≥½B ₁+⅓B ₂.  (18) The remaining inequality in Theorem 1 can be proved by writing the following:

$\begin{matrix} \begin{matrix} {{\alpha + \beta} \geq {B_{1} + {H\left( {W_{1}❘M_{1}} \right)} + {\frac{1}{2}\left\lbrack {B_{1} + {H\left( {S_{1,3},S_{2,3},{W_{3}❘M_{1}}} \right)}} \right\rbrack}}} \\ {= {{\frac{3}{2}B_{1}} + {H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} + {\frac{1}{2}{H\left( {S_{1,3},S_{2,3},{W_{3}❘M_{1}}} \right)}}}} \\ {= {{\frac{3}{2}B_{1}} + {\frac{1}{2}{H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)}} +}} \\ {\frac{1}{2}\left\lbrack {{H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} + {H\left( {S_{1,3},S_{2,3},{W_{3}❘M_{1}}} \right)}} \right\rbrack} \\ {\geq {{\frac{3}{2}B_{1}} + {\frac{1}{2}{H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)}} +}} \\ {\frac{1}{2}\left\lbrack {{H\left( {W_{1},W_{3},S_{1,2},S_{1,3},{S_{2,3}❘M_{1}}} \right)} + {H\left( {S_{1,3}❘M_{1}} \right)}} \right\rbrack} \\ {= {{\frac{3}{2}B_{1}} + {\frac{1}{2}B_{2}} + {\frac{1}{2}\left\lbrack {{H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} + {H\left( {S_{1,3}❘M_{1}} \right)}} \right\rbrack}}} \\ {\overset{(s)}{=}{{\frac{3}{2}B_{1}} + {\frac{1}{2}B_{2}} + {\frac{1}{2}\left\lbrack {{H\left( {W_{1},S_{1,2},{S_{1,3}❘M_{1}}} \right)} + {H\left( {S_{2,3}❘M_{1}} \right)}} \right\rbrack}}} \\ {\geq {{\frac{3}{2}B_{1}} + {\frac{1}{2}B_{2}} + {\frac{1}{2}\left\lbrack {H\left( {W_{1},S_{1,2},S_{1,3},{S_{2,3}❘M_{1}}} \right)} \right\rbrack}}} \\ {= {{\frac{3}{2}B_{1}} + {B_{2}.}}} \end{matrix} & (19) \end{matrix}$ The proof is thus complete.

Exemplary embodiments thus considered multi-reliability regenerating (MRR) codes, which address the storage vs. repair-bandwidth tradeoff in distributed storage systems with heterogeneous reliability requirements. Separate coding using individual regenerating code to satisfy the respective reliability requirement is not optimal, and mixing the information can strictly improve the efficiency of the codes 70.

FIG. 6 is a schematic illustrating still more exemplary embodiments. FIG. 6 is a more detailed diagram illustrating a processor-controlled device 100. As earlier paragraphs explained, the encoding 54 and the decoding algorithm 74 may operate in any processor-controlled device. FIG. 6, then, illustrates the encoding algorithm 54 and the decoding algorithm 74 stored in a memory subsystem of the processor-controlled device 100. One or more processors communicate with the memory subsystem and execute either, some, or all applications. Because the processor-controlled device 100 is well known to those of ordinary skill in the art, no further explanation is needed.

FIG. 7 depicts other possible operating environments for additional aspects of the exemplary embodiments. FIG. 7 illustrates the encoding algorithm 54 and the decoding algorithm 74 operating within various other devices 400. FIG. 7, for example, illustrates that the encoding algorithm 54 and the decoding algorithm 74 may entirely or partially operate within a set-top box (“STB”) (402), a personal/digital video recorder (PVR/DVR) 404, a Global Positioning System (GPS) device 408, an interactive television 410, a tablet computer 412, or any computer system, communications device, or processor-controlled device utilizing the processor 52 and/or a digital signal processor (DP/DSP) 414. The device 400 may also include network switches, routers, modems, watches, radios, vehicle electronics, clocks, printers, gateways, mobile/implantable medical devices, and other apparatuses and systems. Because the architecture and operating principles of the various devices 400 are well known, the hardware and software componentry of the various devices 400 are not further shown and described.

FIG. 8 is a flowchart illustrating a method or algorithm for storage of the data 36, according to exemplary embodiments. The data 36 is received (Block 500) and stored as the unencoded blocks 50 of data (Block 502). Each unencoded block 50 of data is encoded using the erasure codes 70 to generate an encoded block 58 of data (Block 504). Encoding yields the data messages 60 having the symbolic coefficients 72 which are mixed, mapped, and dispersed for storage at different storage nodes 20 (Block 506). Because the symbolic coefficients 72 are mixed, the mixed symbolic coefficients 72 may be retrieved from different storage nodes 20 (Block 508) to decode any data message 60 (Block 510).

Exemplary embodiments may be physically embodied on or in a computer-readable storage medium. This computer-readable medium, for example, may include CD-ROM, DVD, tape, cassette, floppy disk, optical disk, memory card, memory drive, and large-capacity disks. Indeed, exemplary embodiments may be embodied in any hardware device memory. This computer-readable medium, or media, could be distributed to end-subscribers, licensees, and assignees. A computer program product comprises processor-executable instructions for storage of data, as the above paragraphs explained.

While the exemplary embodiments have been described with respect to various features, aspects, and embodiments, those skilled and unskilled in the art will recognize the exemplary embodiments are not so limited. Other variations, modifications, and alternative embodiments may be made without departing from the spirit and scope of the exemplary embodiments. 

The invention claimed is:
 1. A system, comprising: a processor; and a memory that stores instructions that, when executed by the processor, cause the processor to perform operations comprising obtaining, in a data message, a first plurality of information symbols and a second plurality of information symbols, encoding the first plurality of information symbols using an erasure code to generate a plurality of coded symbols, combining a portion of the plurality of coded symbols with a portion of the second plurality of information symbols to generate a plurality of combined data values, wherein one of the plurality of combined data values comprises a linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols, and wherein the one of the second plurality of information symbols is unencoded, and initiating storage of the plurality of combined data values by a plurality of nodes of a distributed storage system.
 2. The system of claim 1, wherein the instructions, when executed by the processor, cause the processor to perform operations further comprising: detecting a failure of one of the plurality of nodes; retrieving a first combined data value of the plurality of combined data values from a first node of the plurality of nodes; retrieving a second combined data value of the plurality of combined data values from a second node of the plurality of nodes; determining, based on the first combined data value and the second combined data value, two of the plurality of coded symbols; and recovering the first plurality of information symbols by decoding, using the erasure code, the two of the plurality of coded symbols.
 3. The system of claim 1, wherein the instructions, when executed by the processor, cause the processor to perform operations further comprising: initiating storage of a mapping of the plurality of combined data values to a plurality of node addresses that correspond to the plurality of nodes.
 4. The system of claim 1, wherein initiating storage of the plurality of combined data values comprises sending a plurality of data messages that includes the plurality of combined data values.
 5. The system of claim 4, wherein the plurality of data messages is directed to the plurality of nodes.
 6. The system of claim 1, wherein the linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols comprises a sum of the one of the plurality of coded symbols and the one of the second plurality of information symbols.
 7. The system of claim 6, wherein another of the plurality of combined data values comprises the one of the second plurality of information symbols.
 8. The system of claim 7, wherein the instructions, when executed by the processor, cause the processor to perform operations further comprising: determining the one of the plurality of coded symbols based on the one of the plurality of combined data values and the other of the plurality of combined data values; and decoding the one of the plurality of coded symbols using the erasure code.
 9. A method, comprising: obtaining, at a storage server that comprises processor and a memory and in a data message, a first plurality of information symbols and a second plurality of information symbols; encoding, by the storage server and using an erasure code, the first plurality of information symbols to generate a plurality of coded symbols; combining, by the storage server, a portion of the plurality of coded symbols with a portion of the second plurality of information symbols to generate a plurality of combined data values, wherein one of the plurality of combined data values comprises a linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols, and wherein the one of the second plurality of information symbols is unencoded; and initiating, by the storage server, storage of the plurality of combined data values by a plurality of nodes of a distributed storage system.
 10. The method of claim 9, further comprising: detecting a failure of one of the plurality of nodes; retrieving a first combined data value of the plurality of combined data values from a first node of the plurality of nodes; retrieving a second combined data value of the plurality of combined data values from a second node of the plurality of nodes; determining, based on the first combined data value and the second combined data value, two of the plurality of coded symbols; and recovering the first plurality of information symbols by decoding, using the erasure code, the two of the plurality of coded symbols.
 11. The method of claim 9, further comprising: storing a mapping of the plurality of combined data values to a plurality of node addresses that correspond to the plurality of nodes.
 12. The method of claim 9, wherein storing the plurality of combined data values comprises transmitting a plurality of data messages that includes the plurality of combined data values.
 13. The method of claim 12, wherein the plurality of data messages is directed to the plurality of nodes.
 14. The method of claim 9, wherein the linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols comprises a sum of the one of the plurality of coded symbols and the one of the second plurality of information symbols.
 15. The method of claim 14, wherein another of the plurality of combined data values comprises the one of the second plurality of information symbols.
 16. The method of claim 15, further comprising: determining the one of the plurality of coded symbols based on the one of the plurality of combined data values and the other of the plurality of combined data values; and decoding the one of the plurality of coded symbols using the erasure code.
 17. A memory that stores instructions that, when executed by a processor, cause the processor to perform operations comprising: obtaining, in a data message, a first plurality of information symbols and a second plurality of information symbols; encoding the first plurality of information symbols using an erasure code to generate a plurality of coded symbols; combining a portion of the plurality of coded symbols with a portion of the second plurality of information symbols to generate a plurality of combined data values, wherein one of the plurality of combined data values comprises a linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols, and wherein the one of the second plurality of information symbols is unencoded; and initiating storage of the plurality of combined data values by a plurality of nodes of a distributed storage system.
 18. The memory of claim 17, wherein the instructions, when executed by the processor, cause the processor to perform operations further comprising: detecting a failure of one of the plurality of nodes; retrieving a first combined data value of the plurality of combined data values from a first node of the plurality of nodes; retrieving a second combined data value of the plurality of combined data values from a second node of the plurality of nodes; determining, based on the first combined data value and the second combined data value, two of the plurality of coded symbols; and recovering the first plurality of information symbols by decoding, using the erasure code, the two of the plurality of coded symbols.
 19. The memory of claim 17, wherein the linear combination of one of the plurality of coded symbols and one of the second plurality of information symbols comprises a sum of the one of the plurality of coded symbols and the one of the second plurality of information symbols.
 20. The memory of claim 17, wherein storing the plurality of combined data values comprises sending a plurality of data messages that includes the plurality of combined data values, wherein the plurality of data messages are directed to the plurality of nodes. 